1. Field of the Invention
The present invention relates to a semiconductor memory device including a film formed of a ferroelectric material and a method for producing the same, and specifically to a non-volatile memory device including a film formed of a ferroelectric material and a method for producing the same.
2. Description of the Related Art
Non-volatile memory devices including a film formed of a ferroelectric material are roughly classified into two types. One type is referred to as a capacitor type device. and the other is referred to as an MFS (metal-ferroelectric-semiconductor) FBT device.
A capacitor type device has a capacitor structure including a ferroelectric thin film interposed between two electrodes. Information is read or written by detecting whether or not there is an inverted current which flows when the spontaneous polarization of the ferroelectric film is inverted. The capacitor type device mainly has the following two problems (1) since the stored information is destroyed when the information is read, rewrite of the information is required; and (2) each time the information is read, the spontaneous polarization is inverted, which causes fatigue.
The capacitor type device also has an advantage in that the ferroelectric film, which is provided on a Pt electrode or the like, tends to have relatively high quality. Due to this advantage, the capacitor type device has been developed for practical use. In order to secure a sufficient amount of signals required to determine the contents of the memory, oxide ferroelectric materials having a relatively high value of spontaneous polarization are the main targets of study. Such oxide ferroelectric materials are, for example, PZT (lead zirconate titanate) represented by Pb (ZrxTi1xe2x88x92x)O3 (0xe2x89xa6xxe2x89xa61), and Bi-based layered oxides including BrBi2Ta2O9 and Bi4Ti3O12.
MFSFET devices allow non-destructive information read. An MFSFET device includes an Si (silicon) substrate having, in a surface area thereof, a source region and a drain region each formed of an impurity diffusive region and a channel region sandwiched between the source region and the drain region; a gate insulating layer formed of a ferroelectric thin film provided on the channel region, and a gate electrode provided on the ferroelectric thin film. The ferroelectric thin film is included in place of a gate oxide film included in a usual MOS (metal-oxide-semiconductor)FET. An MFSFET utilizes the phenomenon, in which charges are exalted on a surface of the semiconductor substrate by spontaneous polarization of the ferroelectric thin film, to control the conductivity in the channel region.
Information is written into the MFSFET device by applying a positive or negative voltage between the gate electrode and the Si substrate to fix the polarization direction of the ferroelectric thin film. Information is read from the MFSFET device in a non-destructive manner by detecting the conductivity state of the channel region. The conductivity state of the channel region changes in accordance with the direction of the polarization direction of the ferroelectric thin film.
The ferroelectric thin film is required to have a polarization charge amount which to only sufficient to change the potential on the surface of the Si substrate Thus, the value of the spontaneous polarization required for the MFSFET device is smaller than that required for the capacitor type device.
As can be appreciated from the above description, the MFSFET device realizes non-destructive information read and accordingly does not require rewrite of the information as is required in the capacitor type device. Thus, the MFSFET device does not have the problem of the fatigue by the polarization which is unavoidable in the case of the capacitor type device. The MFSFET device also needs only a smaller memory cell area than the capacitor type device, and thus is highly suitable for higher integration.
However, the MFSFET device has the following problems in terms of stability.
Formation of a ferroelectric thin film of an oxide ferroelectric material of, for example, PZT, SrBi2Ta2O9 or Bi4Ti3O12 directly on the Si substrate usually includes a process of heat treatment performed at a temperature as high as 500xc2x0 C. to 800xc2x0 C. Accordingly, an element of the ferroelectric material, e.g., Pb or Bi, is diffused in the Si substrate to form an interface reaction layer; or an Si oxide film is formed at a surface of the Si substrate by oxygen. This undesirably results in, for example, deterioration in the crystallinity of the ferroelectric thin film or an increase in the interface state density (problem 1). When an Si oxide film or the like having a relatively low specific dielectric constant is formed, the effective voltage applied on the ferroelectric portion of the film is significantly decreased due to the relatively high specific dielectric constant of the oxide ferroelectric material (200 to 1,000). This results in an increase in the operating voltage (problem 2).
The oxide ferroelectric material is easily reduced by hydrogen gas sintering, etching using hydrogen (H), or metal or insulating film formation which are included in a usual Si-MOSFET process. As a result, the ferroelectric material is changed from an insulating material into a conductive material and thus changes the characteristics thereof. As appreciated from this, the oxide ferroelectric material is not properly usable in the usual Si-MOSFET process (problem 3).
It has been proposed to use a fluoride ferroelectric material such as, for example, BaMgF4 having a specific dielectric constant as low as about 10 in place of the oxide ferroelectric material (see, for example, S. Sinharoy et al., J. Vac. Sci. Technol., A9(3), page 409, 1991). It is difficult to form a BaMgF4 layer directly on the Si substrate in consideration of the coefficient of thermal expansion and the lattice constant of Si and BaMgF4. Therefore, it has been proposed to form a buffer layer formed of a fluoride between the Si substrate and the BaMgF4 layer (Japanese Laid-Open Publication No. 8-55919).
Fluorine (F), which is an element of a fluoride, has problems in terms of stability that fluorine is easily diffused in the Si substrate to form an Sixe2x80x94F bond, thus increasing an interface level (problem 4) and that fluorine reacts with water (problem 5).
It has also been proposed to use an SrTiO3 layer having a relatively high specific dielectric constant as the buffer layer. Like in the case of the oxide ferroelectric material, it is difficult to form an SrTiO3 layer directly on the Si substrate without causing any interface reaction (problem 6). In order to avoid this, it is proposed to form an SrTiO3/SiO2 two-layer buffer layer as disclosed in Japanese Laid-Open Publication No. 8-335580. However, as disclosed in Japanese Laid-Open Publication No. 7-38061, in the case where the SrTiO3 layer is formed by sputtering, the fluorine contained in an SrTiO3 target in a large amount is diffused in the SiO2 layer during the layer formation or heat treatment performed after the layer formation. As a result, the Sixe2x80x94O bond is cut to form an Sixe2x80x94F bond. At this point, the oxygen (O) released from the Sixe2x80x94O bond it diffused in the Si/SiO2 interface to increase the thickness of the SiO2 layer, thus deteriorating the device characteristics (problem 7).
According to one aspect of the invention, a semiconductor memory device includes a semiconductor substrate having a channel therein; a gate insulating layer formed of a ferroelectric material provided on the semiconductor substrate; and a gate electrode provided on the gate insulating layer. The ferroelectric material includes a nitrogen (N) and at least one element selected from the group consisting of Mg, Sr, Ba and Ca.
In one embodiment of the invention, the ferroelectric material is represented by formula (1):
A2BN3xe2x80x83xe2x80x83(1)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of V, Nb, Ta and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (2)
(AXB1xe2x88x92x)2CN3xe2x80x83xe2x80x83(2)
where x is in the range of 0xe2x89xa6xxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca. and C is one element selected from the group consisting of V, Nb, Ta and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (3):
(AxB1xe2x88x92x)2(CyD1xe2x88x92y)N3xe2x80x83xe2x80x83(3)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg. Sr, Ba and Ca, and C and D are each one element selected from the group consisting of V, Nb, Ta and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (4):
AB2N4xe2x80x83xe2x80x83(4)
Where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of V, Nb, Ta and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (5):
(AxB1xe2x88x92x)C2N4xe2x80x83xe2x80x83(5)
where x is in the range of 0xe2x89xa6xxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C is one element selected from the group consisting of V, Nb, Ta and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (6):
(AxB1xe2x88x92x)2(CyD1xe2x88x92y)2N4xe2x80x83xe2x80x83(6)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of V, Nb, Ta and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (7):
A2BN2xe2x80x83xe2x80x83(7)
where A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca.
In one embodiment of the invention, the ferroelectric material is represented by formula (8):
(AxB1xe2x88x92x)2(CyD1xe2x88x92y)N2xe2x80x83xe2x80x83(8)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A, B, C and D are each one element selected from the group consisting of Mg, Sr, Ba and Ca.
In one embodiment of the invention, the ferroelectric material is represented by formula (9):
A3B2N4xe2x80x83xe2x80x83(9)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (10):
(AxB1xe2x88x92x)3C2N4xe2x80x83xe2x80x83(10)
where x is in the range of 0xe2x89xa6xxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (11):
(AxB1xe2x88x92x)3(C2N4xe2x80x83xe2x80x83(11)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (12):
A3B5N7xe2x80x83xe2x80x83(12)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (13):
(AxB1xe2x88x92z)3C5N7xe2x80x83xe2x80x83(13)
where x is in the range of 0xe2x89xa6xxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (14);
(AxB1xe2x88x92x)3(CyD1xe2x88x92y)5N7xe2x80x83xe2x80x83(14)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the ferroelectric material is represented by formula (15):
A2B3C2N7xe2x80x83xe2x80x83(15)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, B is one element selected from the group consisting of Al, Y, La, Sa, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn, and C is one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, Hf. V and Nb.
In one embodiment of the invention, the ferroelectric material is represented by formula (16).
(AxB1xe2x88x92x)2C3D2N7xe2x80x83xe2x80x83(16)
where x is in the range of 0xe2x89xa6xxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, C is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn. and D is one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, Hf. V and Nb.
In one embodiment of the invention, the ferroelectric material is represented by formula (17);
(AxB1xe2x88x92x)2(CyD1xe2x88x92y)3(EzF1xe2x88x92z)2N7xe2x80x83xe2x80x83(17)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, z is in the range of 0xe2x89xa6xxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn, and E and F are each one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, Hf, V and Nb.
In one embodiment of the invention, the semiconductor memory device further includes a buffer layer between the semiconductor substrate and the gate insulating layer, wherein the buffer layer is formed of one of SiN and SiO2.
According to another aspect of the invention, a method for producing a semiconductor memory device includes the steps of forming a gate insulating layer formed of a ferroelectric material containing nitrogen and at least one element selected from the group consisting of Mg, Sr, Ba and Ca on a semiconductor substrate; and heat-treating the gate insulating layer formed on the semiconductor substrate in one of an ammonia atmosphere and a nitrogen radical ion-containing atmosphere.
In one embodiment of the invention, the ammonia atmosphere is an ammonia plasma atmosphere.
According to still another aspect of the invention, a semiconductor memory device includes a semiconductor substrate having a channel therein; a gate insulating layer provided on the semiconductor substrate; a gate electrode provided on the gate insulating layer; a buffer layer formed of SiN provided between the semiconductor substrate and the gate insulating layer. The gate insulating layer is formed of a fluoride ferroelectric material.
According to still another aspect of the invention, a method for producing a semiconductor memory device includes the steps of forming an SiO2 layer on a semiconductor substrate; nitriding the SiO2 layer in one of an ammonia atmosphere, an N2O atmosphere, and A nitrogen radical ion-containing atmosphere; forming a gate insulating layer formed of a fluoride ferroelectric material on the nitrided SiO2 layer; and forming a gate electrode on the gate insulating layer.
In one embodiment of the invention, the ammonia atmosphere is an ammonia plasma atmospheres
According to still another aspect of the invention, a method for producing a semiconductor memory device includes the steps of forming a gate insulating layer formed of a fluoride ferroelectric material containing fluorine and at least one element selected from the group consisting of Mg, Sr, Ba and Ca on a semiconductor substrate; and nitriding the gate insulating, layer formed on the semiconductor substrate in one of an ammonia atmosphere and a nitrogen radical ion-containing atmosphere.
In one embodiment of the invention, the ammonia atmosphere to an ammonia plasma atmosphere.
In one embodiment of the invention, the fluoride ferroelectric material is one material selected from the group consisting of BaMgF4, BaCoF4, BaNiF4 and BaZnF4.
In one embodiment of the invention, the fluoride ferroelectric material is one material selected from the group consisting of BaMgF4, BaCoF4, BaNiF4 and BaZnF4.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (18):
ABF5xe2x80x83xe2x80x83(18)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ca, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (18):
ABF5xe2x80x83xe2x80x83(18)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (19)
(AxB1-x)(CyD1-y)F5xe2x80x83xe2x80x83(19)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (19)
xe2x80x83(AxB1xe2x88x92x)(CyD1xe2x88x92y)F5xe2x80x83xe2x80x83(19)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, ga and Ca, and C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (20):
ABF6xe2x80x83xe2x80x83(20)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, Ef, V and Nb.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (20):
ABF6xe2x80x83xe2x80x83(20)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, Rf, V and Nb.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (21)
(AxB1xe2x88x92x)(CyD1xe2x88x92y)F6xe2x80x83xe2x80x83(21)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, Hf, V and Nb.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (21):
(AxB1xe2x88x92x)(CyD1xe2x88x92y)F6xe2x80x83xe2x80x83(21)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of Ti, Ta, Mn, Co, Zr, HE, V and Nb.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (22)
A5B3F19xe2x80x83xe2x80x83(22)
where A to one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mu.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (22):
A5B3F19xe2x80x83xe2x80x83(22)
where A is one element selected from the group consisting of Mg, Sr, Ba and Ca, and B is one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (23):
(AxB1xe2x88x92x)5(CyD1xe2x88x92y)3F19xe2x80x83xe2x80x83(23)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Or, Ba and Ca, and C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
In one embodiment of the invention, the fluoride ferroelectric material is represented by formula (23)
xe2x80x83(AxB1xe2x88x92x)5(CyD1xe2x88x92y)3F19xe2x80x83xe2x80x83(23)
where x is in the range of 0xe2x89xa6xxe2x89xa61, y is in the range of 0xe2x89xa6yxe2x89xa61, A and B are each one element selected from the group consisting of Mg, Sr, Ba and Ca, and C and D are each one element selected from the group consisting of Al, Y, La, Sc, Co, Gd, Ce, Nd, Er, V, Ti, Ta, Nb and Mn.
According to still another aspect of the invention, a semiconductor memory device includes a semiconductor substrate having a channel therein; a buffer layer formed of at least one of MgSiO3, Mg2SiO4, SrSiO3, Sr2SiO4, (MgxSr1xe2x88x92x)SiO3 and (MgxSr1xe2x88x92x)2SiO4 (where 0xe2x89xa6xxe2x89xa61) provided on the semiconductor substrate; a gate insulating layer formed of a ferroelectric material provided on the buffer layer: and a gate electrode provided on the gate insulating layer.
In one embodiment of the invention, the ferroelectric material includes at least one element selected from the group consisting of Mg and Sr.
In one embodiment of the invention, the ferroelectric material is formed of at least one material selected from the group consisting of (BaxSr1xe2x88x92x)MgF4 and Ba(MgxSr1xe2x88x92x)F4, where 0xe2x89xa6xxe2x89xa61.
According to still another aspect of the invention, a method for producing a semiconductor memory device includes the steps of forming a buffer layer formed of SiN on an Si substrate; forming an SrTiO3 layer on the buffer layer formed of SiN by sputtering; forming a gate insulating layer formed of a ferroelectric material on the SrTiO3 layer, and forming a gate electrode on the gate insulating layer.
In one embodiment of the invention, the buffer layer is formed by directly nitriding the Si substrate.
According to still another aspect of the invention, a method for producing a semiconductor memory device includes the steps of forming a buffer layer formed of SiO2 on an Si substrate; nitriding the buffer layer formed of SiO2 using one of an ammonia atmosphere, an N2O gas atmosphere, and a nitrogen radical ion-containing atmosphere; forming an SrTiO3 layer on the buffer layer formed of the nitrided SiO2 by sputtering; forming a gate insulating layer formed of a ferroelectric material on the SrTiO3 layer; and forming a gate electrode on the gate insulating layer.
According to still another aspect of the invention, a method for producing a semiconductor memory device includes the steps of forming a thin TiSr layer an Si substrate: forming an SrTiO3 layer on the thin TiSr layer; forming a gate insulating layer formed of ferroelectric material on the SrTiO3 layer; and forming a gate electrode on the gate insulating layer.
In one embodiment of the invention, the SrTiO3 layer is formed by sputtering where the Si substrate has a temperature of about 300xc2x0 C. or less.
In one embodiment of the invention, the SrTiO3 layer is formed on the thin TiSr layer by sputtering, and the step of forming the SrTiO3 layer includes the steps of using an Ar gas, and using an Ar/O2 gas.
In one embodiment of the invention, the method for producing a semiconductor memory device further includes the step of heat-treating the SrTiO3 layer in one of an oxygen gas atmosphere and an ozone-containing oxygen gas atmosphere at a temperature of about 300xc2x0 C. or less.
According to the present invention, the ferroelectric layer acting as a gate insulating layer does not include Pb, Bi or other elements which are highly volatile, and includes a nitride excluding oxygen. Since formation of such a ferroelectric layer does not need heat treatment, formation of an interface reaction layer or a silicon oxide layer at an interface between the semiconductor substrate and the ferroelectric layer is suppressed. Therefore, the crystallinity in the ferroelectric layer is not deteriorated or the interface state density is not increased. Thus, satisfactory interface characteristics are obtained. The above-mentioned problem 1 to solved.
The ferroelectric layer according to the present invention has a low specific dielectric constant. Therefore, the effective voltage applied on the ferroelectric portion of the film is not decreased. Accordingly, the operating voltage is not increased. The above-mentioned problem 2 is solved.
Unlike the oxide ferroelectric layer, the nitride ferroelectric layer according to the present invention is not likely to be reduced by hydrogen gas sintering, etching using hydrogen, or metal or insulating film formation which are included in a usual Si-MOSFET process. Thus, the device characteristics are maintained stable. The above-mentioned problem 3 is solved.
In the embodiment where the buffer layer between the semiconductor substrate and the fluoride ferroelectric layer is formed of SiN, or SiO2 having a nitrided surface, the buffer layer acts an a barrier against the diffusion of fluorine which is contained in the fluoride ferroelectric layer in a large amount during heat treatment processes of, for example, formation of the ferroelectric layer, and ion implantation and annealing for activation of the semiconductor substrates As a result, an increase in the interface level caused by the diffusion of fluorine is prevented. An increase in the thickness of the SiO2 layer caused by the diffusion of oxygen released from the Sixe2x80x94O bond is also prevented. Thus, the reliability of the MFSFET device is improved, solving the above-mentioned problem 4.
In the embodiment where the fluoride ferroelectric layer is partially replaced with nitrogen by nitriding in an ammonia atmosphere or a nitrogen radical ion-containing atmosphere, the chemical reactivity of water and other substances is suppressed, thus improving the stability of the MFSFET device. The above-mentioned problem 5 is solved.
In the embodiment where the ferroelectric layer is formed of at least one of Mg and Sr and the buffer layer provided between the semiconductor substrate and the ferroelectric layer is formed of at least one of MgSiO3, Mg2SiO4, SrSiO3, Sr2SiO4, (MgSr1xe2x88x92x)SiO3 and (MgxSr1xe2x88x92x)2SiO4 (where 0xe2x89xa6xxe2x89xa61), the buffer layer has a relatively high dielectric constant. The crystallinity of the ferroelectric layer is improved and a satisfactory interface between the semiconductor substrate and the ferroelectric layer is realized. Thus, problem 6 is solved. The MgSiO3, Mg2SiO4, SrSiO3, Sr2SiO4, (MgxSr1xe2x88x92x)SiO3 and (MgxSr1xe2x88x92x)2SiO4 include both (i) Mg or Sr included in the ferroelectric layer and (ii) SiO2, realizing a satisfactory interface characteristic with silicon.
In the embodiment where the SrTiO3 layer is formed by sputtering after the buffer layer formed of SiN, or SiO2 having a nitrided surface obtained by an ammonia gas, an N2O gas or a nitrogen radical ion-containing gas is formed, the diffusion of fluorine contained in the SrTiO3 layer in a large amount is suppressed. An increase in the interface level caused by the diffusion of fluorine and an increase in the thickness of the SiO2 layer are prevented, The ferroelectric layer maintains a satisfactory interface characteristic with the semiconductor substrate, thus improving the device characteristics. Thus, problem 7 is solved.
In the embodiment where the thin film of TiSr is formed and then the SrTiO3 layer is formed by sputtering in a two-step manner (step 1: using Ar gas; and step 2: using Ar/O2 gas) at a relatively low temperature, the TiSr layer is substantially incorporated into the SrTiO3 layer. Thus, the ferroelectric layer does not have reactivity with the semiconductor substrate.
Thus, the invention described herein makes possible the advantages of providing a stable and reliable semiconductor memory device which has satisfactory characteristics at the interface between the semiconductor substrate and the gate insulating layer formed of a nitride or fluoride ferroelectric material and can be produced using a general Si-MOSFET process; and a method for producing the
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.